Company Overview
Since 2004, Vadum has built a brand known for practical innovation that delivers solutions to customers in the competitive field of national defense research and development. Vadums expertise is bringing concepts to life in the form of products or prototypes to address challenging national defense problems.
Vadum is seeking a highly motivated mid-to-senior level engineer with a strong background in HDL programming. This position will play an active role in every phase of the FPGA development cycle, including the design, installation, and troubleshooting of the firmware used to design FPGA based hardware systems and their components.
Key Responsibilities:
Design, implement, debug, and maintain modules within complex FPGA designs.
Debug of HDL designs within simulation, development of testbenches and stimulus/emulation logic.
Deliver to objectives including meeting deadlines and schedule.
Adapt systems quickly to meet changing business needs.
Write scripts and conduct testing through root cause analysis and debugging resolution.
Handle testing, system performance, environmental and system troubleshooting.
Understand hardware/software interfaces and collaborate with firmware engineers.
Maintain and improve existing designs and source code to help attain the goal of a modular structure within a fast-paced, collaborative, design environment.
Use Matlab and other similar tools to generate accurate models, data sets and coefficients for analysis.
Perform other related duties as assigned and serve as a technical resource to the team.
Requirements:
Bachelors degree or higher in engineering, computer science, or relevant field required.
Relevant experience required: BS, 6-10 years or MS, 5-8 years or PhD, 4-8 years.
Maintain US Citizenship.
Maintain Security Clearance or eligibility to obtain.
Extensive knowledge of digital hardware.
In depth knowledge and use of VHDL, Verilog, and System Verilog HDL languages.
Use of Xilinx Vivado FPGA design toolchain including ILAs, and other hardware debugging tools.
Good interpersonal and communication skills to work and communicate with internal and external customers.
Strong analytical thinking skills.
Strong HDL programming and code writing skills.
Experience with testing, validation, and debugging tools.
Experience and know how to use Matlab and other similar tools to generate accurate models, data sets and coefficients for analysis.
Experience with Linux operating procedures is a plus.
Experience with timing analysis, pipelining, floorplanning, and constraints implementation to close timing within complex FPGA hardware designs a plus.
What we offer
Vadum offers a comprehensive benefit program, including:
Medical
Dental
Vision
Life Insurance
Flexible Spending Account
401k (k) with up to 4% company match
Paid Time Off (Sick, Vacation)
13 Paid Holidays
Tuition Reimbursement
Voluntary Benefit Offerings (STD, Critical Illness and Hospital Indemnity Insurance, Legal Plan)
Work/life balance
Vadum is an equal opportunity/affirmative action employer, and all qualified applicants will receive consideration for employment without regard to race, color, religion, sex, gender identity, age, genetic trait, sexual orientation, national origin, disability status, or any other characteristic protected by law.
Vadum is committed to providing reasonable accommodations for qualified individuals with disabilities and disabled veterans in our job application procedures. If you need assistance or an accommodation due to a disability, you may contact the Human Resources Department at (919) 341-8241 ext.: 180.
